MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 76

• Manufacturer Part Number: MC68HC711E9CFNE2
• Description: IC MCU 8BIT 512RAM 52-PLC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Operating Modes and On-Chip Memory
Technical Data
76
$101E
$101F
$1020
$1021
$1022
$1023
$1024
$1025
$1026
Addr.
Timer Input Capture 4/Output
Timer Input Capture 4/Output
Pulse Accumulator Control
Compare 5 Register High
Compare 5 Register Low
Timer Control Register 1
Timer Control Register 2
(TI4/O5)
(TI4/O5)
Timer Interrupt Mask 1
Timer Interrupt Mask 2
Timer Interrupt Flag 1
Timer Interrupt Flag 2
Figure 4-7. Register and Control Bit Assignments (Sheet 5 of 8)
Register (TMSK1)
Register (TMSK2)
Register (PACTL)
Register Name
See page 186.
See page 186.
See page 194.
See page 183.
See page 195.
See page 196.
See page 196.
See page 201.
See page 202.
(TFLG1)
(TFLG2)
(TCTL1)
(TCTL2)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Operating Modes and On-Chip Memory
I = Indeterminate after reset
EDG4B EDG4A
DDRA7
Bit 15
OC1F
OC1I
Bit 7
OM2
Bit 7
TOF
TOI
1
1
0
0
0
0
0
0
0
= Unimplemented
Bit 14
OC2F
PAEN
OC2I
RTIF
Bit 6
OL2
RTII
6
1
1
0
0
0
0
0
0
0
PAMOD
EDG1B
PAOVF
PAOVI
OC3F
Bit 13
OC3I
OM3
Bit 5
5
1
1
0
0
0
0
0
0
0
PEDGE
EDG1A
OC4F
Bit 12
OC4I
Bit 4
PAIF
OL3
PAII
R
4
1
1
0
0
0
0
0
0
0
= Reserved
EDG2B
DDRA3
I4/O5F
I4/O5I
Bit 11
OM4
Bit 3
3
1
1
0
0
0
0
0
0
0
M68HC11E Family — Rev. 3.2
EDG2A
Bit 10
I4/O5
U = Unaffected
IC1F
Bit 2
OL4
IC1I
2
1
1
0
0
0
0
0
0
0
EDG3B
RTR1
OM5
IC2F
Bit 9
Bit 1
PR1
IC2I
1
1
1
0
0
0
0
0
0
0
MOTOROLA
EDG3A
RTR0
Bit 0
IC3F
Bit 8
Bit 0
PR0
OL5
IC3I
1
1
0
0
0
0
0
0
0