DF2372RVFQ34V Renesas Electronics America, DF2372RVFQ34V Datasheet - Page 895
DF2372RVFQ34V
Manufacturer Part Number
DF2372RVFQ34V
Description
IC H8S/2372 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2372RVFQ34V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2372RVFQ34V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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• DACR23
Bit
7
6
5
4 to
0
Table 18.3 Control of D/A Conversion
Bit 5
DAE
0
1
Bit Name
DAOE3
DAOE2
DAE
—
Bit 7
DAOE3
0
1
0
1
Bit 6
DAOE2 Description
0
1
0
1
0
1
0
1
Initial Value
0
0
0
All 1
D/A conversion disabled
Channel 2 D/A conversion enabled, channel3 D/A conversion disabled
Channel 3 D/A conversion enabled, channel2 D/A conversion disabled
Channel 2 and 3 D/A conversions enabled
D/A conversion disabled
Channel 2 and 3 D/A conversions enabled
R/W
R/W
R/W
R/W
—
D/A Output Enable 3
Controls D/A conversion and analog output.
0: Analog output (DA3) is disabled
1: Channel 3 D/A conversion is enabled; analog output
D/A Output Enable 2
Controls D/A conversion and analog output.
0: Analog output (DA2) is disabled
1: Channel 2 D/A conversion is enabled; analog output
Used together with the DAOE2 and DAOE3 bits to
control D/A conversion. When the DAE bit is cleared to
0, channel 2 and 3 D/A conversions are controlled
independently. When the DAE bit is set to 1, channel 2
and 3 D/A conversions are controlled together.
Output of conversion results is always controlled
independently by the DAOE2 and DAOE3 bits. For
details, see table 18.3.
These bits are always read as 1 and cannot be modified.
Description
D/A Enable
Reserved
(DA3) is enabled
(DA2) is enabled
Rev.7.00 Mar. 18, 2009 page 827 of 1136
Section 18 D/A Converter
REJ09B0109-0700
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