DF2372RVFQ34V Renesas Electronics America, DF2372RVFQ34V Datasheet - Page 953
DF2372RVFQ34V
Manufacturer Part Number
DF2372RVFQ34V
Description
IC H8S/2372 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2372RVFQ34V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2372RVFQ34V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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For details on the program processing procedure, see section 21.4.2, User Program Mode.
(a) Flash multipurpose address area parameter (FMPAR: general register ER1 of CPU)
This parameter stores the start address of the programming destination on the user MAT.
When the address in the area other than flash memory space is set, an error occurs.
The start address of the programming destination must be at the 128-byte boundary. If this
boundary condition is not satisfied, an error occurs. The error occurrence is indicated by the WA
bit (bit 1) in FPFR.
Bit
31 to 0
(b) Flash multipurpose data destination parameter (FMPDR: general register ER0 of CPU):
This parameter stores the start address in the area which stores the data to be programmed in the
user MAT. When the storage destination of the program data is in flash memory, an error occurs.
The error occurrence is indicated by the WD bit in FPFR.
Bit
31 to 0
When data to be programmed does not satisfy 128 bytes, the 128-byte program data must be
prepared by filling with the dummy code H'FF.
The start address of the area in which the prepared program data is stored must be stored in a
general register ER0. This parameter is called as FMPDR (flash multipurpose data destination
area parameter).
Bit
Name
MOA31 to
MOA0
Bit
Name
MOD31 to
MOD0
Initial
Value
⎯
Initial
Value
⎯
R/W
R/W
R/W
R/W
Description
Store the start address of the programming destination
on the user MAT. The consecutive 128-byte
programming is executed starting from the specified start
address of the user MAT. Therefore, the specified
programming start address becomes a 128-byte
boundary and MOA6 to MOA0 are always 0.
Description
Store the start address of the area which stores the
program data for the user MAT. The consecutive 128-
byte data is programmed to the user MAT starting from
the specified start address.
Section 21 Flash Memory (0.18-μm F-ZTAT Version)
Rev.7.00 Mar. 18, 2009 page 885 of 1136
REJ09B0109-0700
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