DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 294

• Manufacturer Part Number: DF2161BVTE10
• Description: MCU 3V 128K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2161BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 114
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2161BVTE10; HD64F2161BVTE10

Section 9 8-Bit PWM Timer (PWM)
Bit
7
6
5
4
3
2
1
0
Legend:
X:
To perform PWM 256/256 output when DDR = 1 and OE = 0, the corresponding pin should be set
to port output. The corresponding pin can be set as port output in single-chip mode or when IOSE
= 1 and CS256E = 0 in SYSCR in extended mode with on-chip ROM. Otherwise, it should be
noted that an address bus is output to the corresponding pin.
DR data is output when the corresponding pin is used as port output. A value corresponding to
PWM 256/256 output is determined by the OS bit, so the value should have been set to DR
beforehand.
9.3.5
PCSR selects the PWM input clock.
Bit
3
2
1
0
Rev. 3.00 Mar 21, 2006 page 238 of 788
REJ09B0300-0300
PWOERB
Don't care
Bit Name
OE15
OE14
OE13
OE12
OE11
OE10
OE9
OE8
Bit Name
—
PWCKB
PWCKA
—
Peripheral Clock Select Register (PCSR)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R
Description
Output Enable 15 to 8
These bits, together with P2DDR, specify the P2n/PWn
pin state. Bits OE15 to OE8 correspond to outputs
PW15 to PW8.
P2nDDR OEn: Pin state
0X: Port input
10: Port output or PWM 256/256 output
11: PWM output (0 to 255/256 output)
Description
Reserved
This bit is always read as 0. The initial value should not
be changed.
PWM Clock Select B, A
Together with bits PWCKE and PWCKS in PWSL,
these bits select the internal clock input to TCNT in the
PWM. For details, see table 9.2.
Reserved
This bit is always read as 0. The initial value should not
be changed.