DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 325
DF2161BVTE10
Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2161BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
HD64F2161BVTE10
- Current page: 325 of 847
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11.3.9
TOCR enables output from the output compare pins, selects the output levels, switches access
between output compare registers A and B, controls the ICRD and OCRA operating modes, and
switches access to input capture registers A, B, and C.
Bit
1
0
Bit
7
6
5
Bit Name
CKS1
CKS0
Bit Name
ICRDMS
OCRAMS
ICRS
Timer Output Compare Control Register (TOCR)
Initial Value
0
0
Initial Value
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Clock Select 1, 0
Select clock source for FRC.
00: /2 internal clock source
01: /8 internal clock source
10: /32 internal clock source
11: External clock source (counting at FTCI rising edge)
Specifies whether ICRD is used in the normal operating
mode or in the operating mode using OCRDM.
0: The normal operating mode is specified for ICRD
1: The operating mode using OCRDM is specified for
Specifies whether OCRA is used in the normal
operating mode or in the operating mode using OCRAR
and OCRAF.
0: The normal operating mode is specified for OCRA
1: The operating mode using OCRAR and OCRAF is
The same addresses are shared by ICRA and OCRAR,
by ICRB and OCRAF, and by ICRC and OCRDM. The
ICRS bit determines which registers are selected when
the shared addresses are read from or written to. The
operation of ICRA, ICRB, and ICRC is not affected.
0: ICRA, ICRB, and ICRC are selected
1: OCRAR, OCRAF, and OCRDM are selected
Description
Description
Input Capture D Mode Select
Output Compare A Mode Select
Input Capture Register Select
ICRD
specified for OCRA
Section 11 16-Bit Free-Running Timer (FRT)
Rev. 3.00 Mar 21, 2006 page 269 of 788
REJ09B0300-0300
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