DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 340
DF2161BVTE10
Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2161BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
HD64F2161BVTE10
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Section 11 16-Bit Free-Running Timer (FRT)
11.7.4
When the internal clock is changed, the changeover may cause FRC to increment. This depends on
the time at which the clock is switched (bits CKS1 and CKS0 are rewritten), as shown in table
11.3.
When an internal clock is used, the FRC clock is generated on detection of the falling edge of the
internal clock scaled from the system clock ( ). If the clock is changed when the old source is high
and the new source is low, as in case no. 3 in table 11.3, the changeover is regarded as a falling
edge that triggers the FRC clock, and FRC is incremented. Switching between an internal clock
and external clock can also cause FRC to increment.
Table 11.3 Switching of Internal Clock and FRC Operation
No.
1
2
Rev. 3.00 Mar 21, 2006 page 284 of 788
REJ09B0300-0300
Timing of Switchover
by Means of CKS1
and CKS0 Bits
Switching from
low to low
Switching from
low to high
Switching of Internal Clock and FRC Operation
FRC Operation
Clock before
switchover
Clock after
switchover
FRC clock
FRC
Clock before
switchover
Clock after
switchover
FRC clock
FRC
N
N
CKS bit rewrite
N + 1
CKS bit rewrite
N + 1
N + 2
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