DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 350
DF2161BVTE10
Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2161BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
HD64F2161BVTE10
- Current page: 350 of 847
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Section 12 8-Bit Timer (TMR)
12.3.5
TCSR indicates the status flags and controls compare-match output.
Bit
7
6
5
4
Rev. 3.00 Mar 21, 2006 page 294 of 788
REJ09B0300-0300
TCSR_0
Bit Name Initial Value R/W
CMFB
CMFA
OVF
ADTE
Timer Control/Status Register (TCSR)
0
0
0
0
R/(W) * Compare-Match Flag B
R/(W) * Compare-Match Flag A
R/(W) * Timer Overflow Flag
R/W
Description
[Setting condition]
When the values of TCNT_0 and TCORB_0 match
[Clearing conditions]
[Setting condition]
When the values of TCNT_0 and TCORA_0 match
[Clearing conditions]
[Setting condition]
When TCNT_0 overflows from H'FF to H'00
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
A/D Trigger Enable
Enables or disables A/D converter start requests by
compare-match A.
0: A/D converter start requests by compare-match A are
1: A/D converter start requests by compare-match A are
disabled
enabled
Read CMFB when CMFB = 1, then write 0 in CMFB
When the DTC is activated by a CMIB interrupt
Read CMFA when CMFA = 1, then write 0 in CMFA
When the DTC is activated by a CMIA interrupt
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