DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 381
DF2161BVTE10
Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2161BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
HD64F2161BVTE10
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13.3.3
TCONRS selects whether to access TMR_X or TMR_Y registers, and the synchronization signal
output signal source and generation method.
Bit
7
6
5
4
Bit Name
TMRX/Y
ISGENE
HOMOD1
HOMOD0
Timer Connection Register S (TCONRS)
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
TMR_X/TMR_Y Access Select
For details, see table 13.3.
0: The TMR_X registers are accessed at addresses
1: The TMR_Y registers are accessed at addresses
Internal Synchronization Signal
Selects internal synchronization signals (IHG, IVG,
and CL4 signals) as the signal sources for the IHO,
IVO, and CLO signals together with the HOMOD1,
HOMOD0, VOMOD1, VOMOD0, CLMOD1, and
CLMOD0 bits.
Horizontal Synchronization Output Mode Select 1, 0
These bits select the signal source and generation
method for the IHO signal.
00: The IHI signal (without 2fH modification) is
01: The IHI signal (with 2fH modification) is selected
1X: The CL1 signal is selected
XX: The IHG signal is selected
H'(FF)FFF0 to H'(FF)FFF5
H'(FF)FFF0 to H'(FF)FFF5
ISGENE = 0
ISGENE = 1
selected
Rev. 3.00 Mar 21, 2006 page 325 of 788
Section 13 Timer Connection
REJ09B0300-0300
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