DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 490
DF2161BVTE10
Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2161BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
HD64F2161BVTE10
- Current page: 490 of 847
- Download datasheet (5Mb)
Section 16 I
Bit Bit Name
1
Rev. 3.00 Mar 21, 2006 page 434 of 788
REJ09B0300-0300
ADZ
2
C Bus Interface (IIC) (Optional)
Initial Value R/W
0
R/(W) * General Call Address Recognition Flag
Description
In I
the first frame following a start condition is the general call
address (H'00).
[Setting condition]
When the general call address (one frame including a R/W
bit is H'00) is detected in slave receive mode and FS = 0 or
FSX = 0
[Clearing conditions]
If a general call address is detected while FS=1 and
FSX=0, the ADZ flag is set to 1; however, the general call
address is not recognized (AAS flag is not set to 1).
2
When ICDR is written to (transmit mode) or read from
(receive mode)
When 0 is written in ADZ after reading ADZ = 1
In master mode
C bus format slave receive mode, this flag is set to 1 if
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