DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 498
DF2161BVTE10
Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2161BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
HD64F2161BVTE10
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Section 16 I
16.4
The I
16.4.1
The I
The first frame following a start condition always consists of 9 bits.
IIC_0 only is capable of formatless operation, as shown in figure 16.4.
The serial format is a non-addressing format with no acknowledge bit. This is shown in figure
16.5.
Figure 16.6 shows the I
The symbols used in figures 16.3 to 16.6 are explained in table 16.6.
Rev. 3.00 Mar 21, 2006 page 442 of 788
REJ09B0300-0300
(a) FS = 0 or FSX = 0
(b) Start condition retransmission FS = 0 or FSX = 0
S
S
1
1
2
2
C bus interface has an I
C bus format is an addressing format with an acknowledge bit. This is shown in figure 16.3.
Operation
I
SLA
SLA
2
7
C Bus Data Format
7
2
FS = 0 or FSX = 0
Note: This mode is applied to the PC monitor system standard DDC (Display Data Channel).
C Bus Interface (IIC) (Optional)
1
1
Figure 16.4 I
R/W
R/W
DATA
1
1
8
Figure 16.3 I
2
1
C bus timing.
A
A
1
1
2
DATA
A
C bus format and a serial format.
DATA
1
n1
2
n
C Bus Data Format (Formatless) (IIC_0 Only)
m1
DATA
2
C Bus Data Format (I
n
A
1
A/A
1
m
S
1
A
1
m
SLA
7
A/A
1
1
R/W
P
1
Upper row: Transfer bit count (n1, n2 = 1 to 8)
Lower row: Transfer frame count (m1, m2 = from 1)
1
2
C Bus Format)
A/A
1
Transfer bit count
(n = 1 to 8)
Transfer frame count
(m = from 1)
A
1
Transfer bit count
(n = 1 to 8)
Transfer frame count
(m = from 1)
DATA
n2
m2
A/A
1
P
1
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