DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 632
DF2161BVTE10
Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2161BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
HD64F2161BVTE10
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Section 19 Host Interface LPC Interface (LPC)
Table 19.8 summarizes the methods of setting and clearing these bits, and figure 19.8 shows the
processing flowchart.
Table 19.8 HIRQ Setting and Clearing Conditions
Host Interrupt
HIRQ1
(independent
from IEDIR)
HIRQ12
(independent
from IEDIR)
SMI
(IEDIR = 0)
SMI
(IEDIR = 1)
HIRQi
(i = 6, 9 to 11)
(IEDIR = 0)
HIRQi
(i = 6, 9 to 11)
(IEDIR = 1)
Rev. 3.00 Mar 21, 2006 page 576 of 788
REJ09B0300-0300
Setting Condition
Internal CPU writes to ODR1, then reads
0 from bit IRQ1E1 and writes 1
Internal CPU writes to ODR1, then reads
0 from bit IRQ12E1 and writes 1
Internal CPU
• writes to ODR2, then reads 0 from bit
• writes to ODR3, then reads 0 from bit
• writes to TWR15, then reads 0 from bit
Internal CPU
• reads 0 from bit SMIE2, then writes 1
• reads 0 from bit SMIE3A, then writes 1
• reads 0 from bit SMIE3B, then writes 1
Internal CPU
• writes to ODR2, then reads 0 from bit
• writes to ODR3, then reads 0 from bit
Internal CPU
• reads 0 from bit IRQiE2, then writes 1
• reads 0 from bit IRQiE3, then writes 1
SMIE2 and writes 1
SMIE3A and writes 1
SMIE3B and writes 1
IRQiE2 and writes 1
IRQiE3 and writes 1
Clearing Condition
Internal CPU writes 0 to bit IRQ1E1,
or host reads ODR1
Internal CPU writes 0 to bit IRQ12E1,
or host reads ODR1
Internal CPU
• writes 0 to bit SMIE2, or host
• writes 0 to bit SMIE3A, or host
• writes 0 to bit SMIE3B, or host
Internal CPU
• writes 0 to bit SMIE2
• writes 0 to bit SMIE3A
• writes 0 to bit SMIE3B
Internal CPU
• writes 0 to bit IRQiE2, or host
• CPU writes 0 to bit IRQiE3, or host
Internal CPU
• writes 0 to bit IRQiE2
• writes 0 to bit IRQiE3
reads ODR2
reads ODR3
reads TWR15
reads ODR2
reads ODR3
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