DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 82
DF2161BVTE10
Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2161BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
HD64F2161BVTE10
- Current page: 82 of 847
- Download datasheet (5Mb)
Section 2 CPU
2.1.1
The differences between the H8S/2600 CPU and the H8S/2000 CPU are as shown below.
In addition, there are differences in address space, CCR and EXR register functions, power-down
modes, etc., depending on the model.
Rev. 3.00 Mar 21, 2006 page 26 of 788
REJ09B0300-0300
16
32
Two CPU operating modes
Normal mode
Advanced mode
Power-down state
Transition to power-down state by SLEEP instruction
Selectable CPU clock speed
Register configuration
The MAC register is supported only by the H8S/2600 CPU.
Basic instructions
The four instructions MAC, CLRMAC, LDMAC, and STMAC are supported only by the
H8S/2600 CPU.
The number of execution states of the MULXU and MULXS instructions
Instruction
MULXU
MULXS
16-bit register-register multiply: 20 states (MULXU.W), 21 states (MULXS.W)
16-bit register-register divide: 20 states (DIVXU.W)
Differences between H8S/2600 CPU and H8S/2000 CPU
Mnemonic
MULXU.B Rs, Rd
MULXU.W Rs, ERd
MULXS.B Rs, Rd
MULXS.W Rs, ERd
H8S/2600
3
4
4
5
Execution States
H8S/2000
12
20
13
21
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