HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 132
HD6413003TF16V
Manufacturer Part Number
HD6413003TF16V
Description
MCU 5V 0K PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13003TF16V.pdf
(717 pages)
Specifications of HD6413003TF16V
Core Size
16-Bit
Oscillator Type
Internal
Core Processor
H8/300H
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
11
No. Of Pwm Channels
4
Digital Ic Case Style
QFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6413003TF16V
Manufacturer:
ITT
Quantity:
12 000
Company:
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS
Quantity:
36
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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6.3.3 Data Bus
The H8/3003 allows either 8-bit access or 16-bit access to be designated for each of areas 0 to 7.
An 8-bit-access area uses the upper data bus (D
data bus (D
In read access the RD signal applies without distinction to both the upper and lower data bus. In
write access the HWR signal applies to the upper data bus, and the LWR signal applies to the
lower data bus.
Table 6-4 indicates how the two parts of the data bus are used under different access conditions.
Table 6-4 Access Conditions and Data Bus Usage
Area
8-bit-access
area
16-bit-access
area
Note: Undetermined data means that unpredictable data is output.
Invalid means that the bus is in the input state and the input is ignored.
15
to D
Access Read/
Size
—
Byte
Word
8
) and lower data bus (D
Write
Read
Write
Read
Write
Read
Write
Address Strobe
—
—
Even
Odd
Even
Odd
—
—
7
to D
Valid
RD
HWR
RD
HWR
LWR
RD
HWR, LWR Valid
15
112
0
).
to D
8
). A 16-bit-access area uses both the upper
Upper Data Bus
(D
Valid
Valid
Invalid
Valid
Undetermined data Valid
Valid
15
to D
8
)
(D
Lower Data Bus
Invalid
Undetermined data
Invalid
Valid
Undetermined data
Valid
Valid
7
to D
0
)
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