DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 387
DF2148ATE20
Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of DF2148ATE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20
HD64F2148ATE20
Available stocks
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Price
Company:
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
DF2148ATE20IV
Manufacturer:
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12.1
This LSI include an 8-bit timer module with two channels (TMR0 and TMR1). Each channel has
an 8-bit counter (TCNT) and two time constant registers (TCORA and TCORB) that are
constantly compared with the TCNT value to detect compare-matches. The 8-bit timer module can
be used as a multifunction timer in a variety of applications, such as generation of a rectangular-
wave output with an arbitrary duty cycle.
The H8S/2148 Group also has two similar 8-bit timer channels (TMRX and TMRY), and the
H8S/2144 Group and H8S/2147N has one (TMRY). These channels can be used in a connected
configuration using the timer connection function. TMRX and TMRY have greater input/output
and interrupt function related restrictions than TMR0 and TMR1.
12.1.1
Selection of clock sources
Selection of three ways to clear the counters
Timer output controlled by two compare-match signals
Cascading of the two channels (TMR0, TMR1)
Multiple interrupt sources for each channel
TMR0, TMR1: The counter input clock can be selected from six internal clocks and an
external clock (enabling use as an external event counter).
TMRX, TMRY: The counter input clock can be selected from three internal clocks and an
external clock (enabling use as an external event counter).
The counters can be cleared on compare-match A or B, or by an external reset signal.
The timer output signal in each channel is controlled by two independent compare-match
signals, enabling the timer to be used for various applications, such as the generation of
pulse output or PWM output with an arbitrary duty cycle.
(Note: TMRY does not have a timer output pin.)
Operation as a 16-bit timer can be performed using channel 0 as the upper half and channel
1 as the lower half (16-bit count mode).
Channel 1 can be used to count channel 0 compare-match occurrences (compare-match
count mode).
TMR0, TMR1, TMRY: Two compare-match interrupts and one overflow interrupt can be
requested independently.
TMRX: One input capture source is available.
Overview
Features
Section 12 8-Bit Timers
Rev. 4.00 Sep 27, 2006 page 341 of 1130
Section 12 8-Bit Timers
REJ09B0327-0400
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