DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 633
DF2148ATE20
Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of DF2148ATE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20
HD64F2148ATE20
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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18.2
18.2.1
SYSCR is an 8-bit readable/writable register which controls H8S/2148 Group chip operations. Of
the host interface registers, HICR, IDR1, ODR1, STR1, IDR2, ODR2, and STR2 can only be
accessed when the HIE bit is set to 1. HICR2, IDR3, ODR3, STR3, IDR4, ODR4, and STR4 can
be accessed regardless of the setting of the HIE bit. The host interface CS2 and ECS2 pins are
controlled by the CS2E bit in SYSCR and the FGA20E bit in HICR. See section 3.2.2, System
Control Register (SYSCR), and section 5.2.1, System Control Register (SYSCR), for information
on other SYSCR bits. SYSCR is initialized to H'09 by a reset and in hardware standby mode.
Bit 7—CS2 Enable Bit (CS2E): Used together with the FGA20E bit in HICR to select the pin
that performs the CS2 function.
SYSCR
Bit 7
CS2E
0
1
Bit
Initial value
Read/Write
Register Descriptions
System Control Register (SYSCR)
HICR
Bit 0
FGA20E
0
1
0
1
CS2E
R/W
7
0
Description
CS2 pin function halted (CS2 fixed high internally)
CS2 pin function selected for P81/CS2 pin
CS2 pin function selected for P90/ECS2 pin
IOSE
R/W
6
0
INTM1
R
5
0
INTM0
R/W
4
0
Rev. 4.00 Sep 27, 2006 page 587 of 1130
XRST
R
3
1
NMIEG
R/W
2
0
Section 18 Host Interface
R/W
HIE
REJ09B0327-0400
1
0
(Initial value)
RAME
R/W
0
1
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