MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 1229

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100MAL

Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
A.3.1.15
The maximum time for partitioning the D-flash (ERPART=16, DFPART=0) is given by :
A.3.1.16
Erase Verify D-Flash for a given number of words N
A.3.1.17
D-Flash programming time is dependent on the number of words being programmed and their location
with respect to a row boundary, because programming across a row boundary requires extra steps. The
D-Flash programming time is specified for different cases (1,2,3,4 words and 4 words across a row
boundary) at a 50MHz bus frequency. The typical programming time can be calculated using the following
equation, whereby N
boundary is crossed.
The maximum programming time can be calculated using the following equation
A.3.1.18
Typical D-Flash sector erase times are those expected on a new device, where no margin verify fails occur.
They can be calculated using the following equation.
Maximum D-Fash sector erase times can be calculated using the following equation.
The D-Flash sector erase time on a new device is ~5ms and can extend to 20ms as the flash is cycled.
Freescale Semiconductor
t
t part 21800
t check
t
t eradf 5025
t eradf 20100
t
=
dpgm
dpgm
350
=
=
---------------------------- -
f NVMBUS
(
(
(
Full Partition D-Flash (FCMD=0x0F)
Erase Verify D-Flash Section (FCMD=0x10)
D-Flash Programming (FCMD=0x11)
Erase D-Flash Sector (FCMD=0x12)
840
15
15
1
+
+
+
------------------------ -
f
------------------------ -
f NVMOP
(
NVMOP
(
N W
54 N
------------------------ -
f NVMOP
w
56 N
denotes the number of words; BC=0 if no boundary is crossed and BC=1 if a
1
1
)
1
w
w
---------------------------- -
f NVMBUS
)
)
+
+
+
+
MC9S12XE-Family Reference Manual Rev. 1.23
+
(
400000
(
700
1
16 BC
16 BC
3300
---------------------------- -
f NVMBUS
)
---------------------------- -
f NVMBUS
)
)
---------------------------- -
f NVMBUS
)
1
------------------ -
f
------------------ -
f
NVMOP
NVMOP
1
1
1
1
W
is given by .
+
+
+
t mass
(
(
460
460
+
+
(
(
640 N
840 N
W
Appendix A Electrical Characteristics
W
)
)
+
+
(
(
500 BC
500 BC
)
)
)
)
--------------------- -
f
--------------------- -
f
NVMBUS
NVMBUS
1
1
1229

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