MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 157

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100MAL

Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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MC9S12XEP100MAL
0
1. Read: Anytime.
1. Read: Anytime.
2.3.65
2.3.66
Freescale Semiconductor
Address 0x026C
Address 0x026D
Write: Anytime.
Write: Anytime.
PERJ
PPSJ
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
Port J pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset all pull device are enabled.
1 Pull device enabled.
0 Pull device disabled.
Port J pull device select—Determine pull device polarity on input pins
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting a pull-
up or pull-down device if enabled.
1 A rising edge on the associated Port J pin sets the associated flag bit in the PIFJ register. A pull-down device is
0 A falling edge on the associated Port J pin sets the associated flag bit in the PIFJ register.A pull-up device is
PERJ7
PPSJ7
Port J Pull Device Enable Register (PERJ)
Port J Polarity Select Register (PPSJ)
connected to the associated Port J pin, if enabled by the associated bit in register PERJ and if the port is used as
input.
connected to the associated Port J pin, if enabled by the associated bit in register PERJ and if the port is used as
input.
1
0
7
7
PERJ6
PPSJ6
1
Figure 2-63. Port J Pull Device Enable Register (PERJ)
0
6
6
Figure 2-64. Port J Polarity Select Register (PPSJ)
Table 2-61. PERJ Register Field Descriptions
Table 2-62. PPSJ Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
PERJ5
PPSJ5
1
0
5
5
PERJ4
PPSJ4
1
0
4
4
Description
Description
PERJ3
PPSJ3
3
1
3
0
Chapter 2 Port Integration Module (S12XEPIMV1)
PERJ2
PPSJ2
1
0
2
2
Access: User read/write
Access: User read/write
PERJ1
PPSJ1
1
0
1
1
PERJ0
PPSJ0
1
0
0
0
157
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