MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 240

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100MAL

Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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MC9S12XEP100MAL
0
Chapter 4 Memory Protection Unit (S12XMPUV1)
4.3.1.10
Read: Anytime
Write: Anytime
4.3.1.11
Read: Anytime
Write: Anytime
240
Address: Module Base + 0x000A
Address: Module Base + 0x000B
HIGH_ADDR[
HIGH_ADDR[
HIGH_ADDR[
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
22:19]
18:11]
Field
Field
Field
10:3]
NEX
3–0
7–0
7–0
6
W
W
R
R
MPU Descriptor Register 4 (MPUDESC4)
MPU Descriptor Register 5 (MPUDESC5)
No-Execute bit — The NEX bit prevents the described memory range from being used as code memory. If this
bit is set every Op-code fetch in this memory range causes an access violation.
Memory range upper boundary address bits — The HIGH_ADDR[22:19] bits represent bits [22:19] of the
global memory address that is used as the upper boundary for the described memory range.
Memory range upper boundary address bits — The HIGH_ADDR[18:11] bits represent bits [18:11] of the
global memory address that is used as the upper boundary for the described memory range.
Memory range upper boundary address bits — The HIGH_ADDR[10:3] bits represent bits [10:3] of the
global memory address that is used as the upper boundary for the described memory range.
1
1
7
7
1
1
6
6
Figure 4-12. MPU Descriptor Register 4 (MPUDESC4)
Figure 4-13. MPU Descriptor Register 5 (MPUDESC5)
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 4-12. MPUDESC4 Field Descriptions
Table 4-13. MPUDESC5 Field Descriptions
5
1
5
1
HIGH_ADDR[18:11]
HIGH_ADDR[10:3]
1
1
4
4
Description
Description
Description
1
1
3
3
2
1
2
1
Freescale Semiconductor
1
1
1
1
1
1
0
0

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