MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 453

• Manufacturer Part Number: MC9S12XEP100MAL
• Description: IC MCU 16BIT 1M FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XEP100MAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 64 KB
• Interface Type: SPI, SSI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 25
• Operating Supply Voltage: - 0.3 V to + 6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• For Use With: EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

STB
Operation
RS.L ⇒ M[RB, #OFFS5]
RS.L ⇒ M[RB, RI]
RS.L ⇒ M[RB, RI];
RI–1 ⇒ RI;
Stores the low byte of register RS to memory.
CCR Effects
Code and CPU Cycles
1. If the same general purpose register is used as index (RI) and source register (RS), the unmodified content of the source
Freescale Semiconductor
N:
Z:
V:
C:
STB RS, (RB, #OFFS5),
STB RS, (RB, RI)
STB RS, (RB, RI+)
STB RS, (RB, -RI)
—
N
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
register is written to the memory: RS.L ⇒ M[RB, RS-1]; RS-1 ⇒ RS
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Not affected.
Not affected.
Not affected.
Not affected.
—
Z
—
V
Source Form
—
C
RI+1 ⇒ RI;
RS.L ⇒ M[RB, RI]
MC9S12XE-Family Reference Manual Rev. 1.23
Address
Mode
IDO5
IDR+
-IDR
IDR
Store Byte to Memory
1
0
0
0
0
(Low Byte)
1
1
1
1
0
1
1
1
1
1
1
1
0
0
0
0
Machine Code
RS
RS
RS
RS
RB
RB
RB
RB
Chapter 10 XGATE (S12XGATEV3)
RI
RI
RI
OFFS5
STB
0
0
1
0
1
0
Cycles
Pw
Pw
Pw
Pw
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