MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 579

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100MAL

Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
14.4.2
The reset state of each individual bit is listed within the register description section
“Memory Map and Register
14.4.3
This section describes interrupts originated by the ECT block. The MCU must service the interrupt
requests.
The ECT only originates interrupt requests. The following is a description of how the module makes a
request and how the MCU should acknowledge that request. The interrupt vector offset and interrupt
number are chip dependent.
14.4.3.1
This active high output will be asserted by the module to request a timer channel 7–0 interrupt to be
serviced by the system controller.
14.4.3.2
This active high output will be asserted by the module to request a modulus counter underflow interrupt to
be serviced by the system controller.
14.4.3.3
This active high output will be asserted by the module to request a timer pulse accumulator B overflow
interrupt to be serviced by the system controller.
14.4.3.4
This active high output will be asserted by the module to request a timer pulse accumulator A input
interrupt to be serviced by the system controller.
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Table 14-39
Timer channel 7–0
Modulus counter underflow
Pulse accumulator B overflow
Pulse accumulator A input
Pulse accumulator A overflow
Timer overflow
Reset
Interrupts
Channel [7:0] Interrupt
Modulus Counter Interrupt
Pulse Accumulator B Overflow Interrupt
Pulse Accumulator A Input Interrupt
Interrupt Source
lists the interrupts generated by the ECT to communicate with the MCU.
Definition”) which details the registers and their bit-fields.
MC9S12XE-Family Reference Manual Rev. 1.23
Table 14-39. ECT Interrupts
Active high timer channel interrupts 7–0
Active high modulus counter interrupt
Active high pulse accumulator B interrupt
Active high pulse accumulator A input interrupt
Pulse accumulator overflow interrupt
Timer 0verflow interrupt
Description
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
(Section 14.3,
579

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