MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 639

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100MAL

Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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MC9S12XEP100MAL
0
16.3.3.2
The eight data segment registers, each with bits DB[7:0], contain the data to be transmitted or received.
The number of bytes to be transmitted or received is determined by the data length code in the
corresponding DLR register.
Module Base + 0x00X4 to Module Base + 0x00XB
Freescale Semiconductor
Module Base + 0x00X2
Module Base + 0x00X3
DB[7:0]
Field
7-0
Reset:
Reset:
Reset:
W
W
R
R
Figure 16-34. Data Segment Registers (DSR0–DSR7) — Extended Identifier Mapping
W
R
Data bits 7-0
Data Segment Registers (DSR0-7)
7
x
7
x
DB7
7
x
Figure 16-32. Identifier Register 2 — Standard Mapping
Figure 16-33. Identifier Register 3 — Standard Mapping
= Unused; always read ‘x’
= Unused; always read ‘x’
Table 16-33. DSR0–DSR7 Register Field Descriptions
6
x
6
x
DB6
x
6
MC9S12XE-Family Reference Manual Rev. 1.23
5
x
5
x
DB5
5
x
Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
4
x
4
x
DB4
Description
4
x
x
x
DB3
3
3
x
3
DB2
2
x
2
x
2
x
DB1
x
x
1
1
1
x
DB0
0
x
0
x
x
0
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