HD6473228F10V Renesas Electronics America, HD6473228F10V Datasheet - Page 160

• Manufacturer Part Number: HD6473228F10V
• Description: MCU 5V 32K,PB-FREE 64-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/325r

Specifications of HD6473228F10V

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI, UART/USART
• Number Of I /o: 53
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Peripherals: -

8.1.4 Register Configuration
Table 8-2 lists the registers of the 8-bit timer module. Each channel has an independent set of
registers.
Table 8-2. 8-Bit Timer Registers
Name
Timer control register
Timer control/status register
Timer constant register A
Timer constant register B
Timer counter
* Software can write a 0 to clear bits 7 to 5, but cannot write a 1 in these bits.
8.2 Register Descriptions
8.2.1 Timer Counter (TCNT) – H’FFC8 (TMR0), H’FFD0 (TMR1)
Bit
Initial value
Read/Write
Each timer counter (TCNT) is an 8-bit up-counter that increments on a pulse generated from one of
four clock sources. The clock source is selected by clock select bits 2 to 0 (CKS2 to CKS0) of the
timer control register (TCR). The CPU can always read or write the timer counter.
The timer counter can be cleared by an external reset input or by an internal compare-match signal
generated at a compare-match event. Counter clear bits 1 and 0 (CCLR1 and CCLR0) of the timer
control register select the method of clearing.
When a timer counter overflows from H’FF to H’00, the overflow flag (OVF) in the timer
control/status register (TCSR) is set to 1.
The timer counters are initialized to H’00 at a reset and in the standby modes.
R/W
7
0
R/W
6
0
Abbreviation
TCR
TCSR
TCORA
TCORB
TCNT
R/W
5
0
153
R/W
R/W
R/W
R/W
4
0
R/(W)*
R/W
R/W
R/W
3
0
Initial value TMR0
H’00
H’10
H’FF
H’FF
H’00
R/W
2
0
Address
H’FFC8
H’FFC9
H’FFCA H’FFD2
H’FFCB H’FFD3
H’FFCC H’FFD4
R/W
1
0
TMR1
H’FFD0
H’FFD1
R/W
0
0