DF2378RVFQ34WV Renesas Electronics America, DF2378RVFQ34WV Datasheet - Page 686

MCU 3V 512K I-TEMP PB-FREE 144-L

DF2378RVFQ34WV

Manufacturer Part Number
DF2378RVFQ34WV
Description
MCU 3V 512K I-TEMP PB-FREE 144-L
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2378RVFQ34WV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 11 16-Bit Timer Pulse Unit (TPU)
Status Flag Clearing Timing: After a status flag is read as 1 by the CPU, it is cleared by writing
0 to it. When the DTC or DMAC is activated, the flag is cleared automatically. Figure 11.42
shows the timing for status flag clearing by the CPU, and figure 11.43 shows the timing for status
flag clearing by the DTC or DMAC.
Rev.7.00 Mar. 18, 2009 page 618 of 1136
REJ09B0109-0700
Address
Status flag
Interrupt
request
signal
Address
Write signal
Status flag
Interrupt
request
signal
φ
φ
Figure 11.43 Timing for Status Flag Clearing by DTC/DMAC Activation
Figure 11.42 Timing for Status Flag Clearing by CPU
TSR write cycle
Source address
T
TSR address
T
DTC/DMAC
read cycle
1
1
T
T
2
2
T
DTC/DMAC
write cycle
Destination
1
address
T
2

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