DF2377RVFQ33 Renesas Electronics America, DF2377RVFQ33 Datasheet - Page 511
DF2377RVFQ33
Manufacturer Part Number
DF2377RVFQ33
Description
IC H8S MCU FLASH 3V 384K 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2377RVFQ33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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9.5.4
Setting the CHNE bit to 1 enables a number of data transfers to be performed consecutively in
response to a single transfer request. SAR, DAR, CRA, CRB, MRA, and MRB, which define data
transfers, can be set independently.
Figure 9.9 shows the operation of chain transfer. When activated, the DTC reads the register
information start address stored at the vector address, and then reads the first register information
at that start address. The CHNE bit in MRB is checked after the end of data transfer, if the value is
1, the next register information, which is located consecutively, is read and transfer is performed.
This operation is repeated until the end of data transfer of register information with CHNE = 0. It
is also possible, by setting both the CHNE bit and CHNS bit to 1, to specify execution of chain
transfer only when the transfer counter value is 0.
In the case of transfer with CHNE set to 1, an interrupt request to the CPU is not generated at the
end of the specified number of transfers or by setting of the DISEL bit to 1, and the interrupt
source flag for the activation source is not affected.
DTC vector
address
Chain Transfer
Register information
start address
Figure 9.9 Operation of Chain Transfer
Register information
Register information
CHNE=1
CHNE=0
Rev.7.00 Mar. 18, 2009 page 443 of 1136
Section 9 Data Transfer Controller (DTC)
REJ09B0109-0700
Destination
Destination
Source
Source
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