HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 1007

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
23B.2.3 Low-Power Control Register (LPWRCR)
Note: * Bits 7 to 3 in LPWRCR are valid in the U-mask and W-mask versions, and H8S/2635
The LPWRCR is an 8-bit read/write register that controls the low power dissipation modes.
The LPWRCR is initialized to H'00 at a reset and when in hardware standby mode. It is not
initialized in software standby mode. The following describes bits 7 to 2. For details of other bits,
see sections 22A.2.2, 22B.2.2, Low-Power Control Register (LPWRCR).
Bit 7—Direct Transition ON Flag (DTON): When shifting to low power dissipation mode by
executing the SLEEP instruction, this bit specifies whether or not to make a direct transition
between high-speed mode or medium-speed mode and the subactive modes. The selected
operating mode after executing the SLEEP instruction is determined by the combination of other
control bits.
Bit 7
DTON
0
1
Note: * Always set high-speed mode when shifting to watch mode or subactive mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Bit
Initial value
R/W
Group; they are reserved bits in all other versions.
See section 23A.2.3, Low-Power Control Register (LPWRCR), for more information.
Description
•
•
•
•
When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts to sleep mode, software standby mode, or watch mode * .
When the SLEEP instruction is executed in subactive mode, operation shifts
to subsleep mode or watch mode.
When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts directly to subactive mode * , or shifts to sleep mode or
software standby mode.
When the SLEEP instruction is executed in subactive mode, operation shifts directly
to high-speed mode, or shifts to subsleep mode.
:
:
:
DTON*
R/W
7
0
LSON*
R/W
6
0
HD64F2630UF, HD6432630UF, HD64F2630WF, HD6432630WF, HD6432635F, HD64F2635F, HD6432634F]
NESEL*
R/W
5
0
Section 23B Power-Down Modes [HD64F2636UF, HD6432636UF, HD64F2638UF, HD6432638UF,
HD64F2638WF, HD6432638WF, HD64F2639UF, HD6432639UF, HD64F2639WF, HD6432639WF,
SUBSTP*
R/W
4
0
RFCUT*
R/W
3
0
R/W
2
0
STC1
R/W
1
0
(Initial value)
Page 957 of 1458
STC0
R/W
0
0