HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 1222

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Appendix B Internal I/O Register
IMR0—Interrupt Mask Register
IMR1—Interrupt Mask Register
Note: * This register is not available in the H8S/2635 Group.
Page 1172 of 1458
Overload Frame/Bus Off Recovery Interrupt Mask
Bit
Initial value
Read/Write
0
1
Overload frame/bus off recovery interrupt request to CPU by IRR7 enabled
Overload frame/bus off recovery interrupt request to CPU by IRR7 disabled
Bus Off Interrupt Mask
0
1
Bus off interrupt request to CPU by IRR6 enabled
Bus off interrupt request to CPU by IRR6 disabled
Error Passive Interrupt Mask
0
1
IMR7
R/W
Error passive interrupt request to CPU by IRR5 enabled
Error passive interrupt request to CPU by IRR5 disabled
15
1
Receive Overload Warning Interrupt Mask
0
1
REC error warning interrupt request (OVR0) to CPU by IRR4 enabled
REC error warning interrupt request (OVR0) to CPU by IRR4 disabled
Transmit Overload Warning Interrupt Mask
0
1
IMR6
R/W
14
1
TEC error warning interrupt request (OVR0) to CPU by IRR3 enabled
TEC error warning interrupt request (OVR0) to CPU by IRR3 disabled
Remote Frame Request Interrupt Mask
0
1
Remote frame reception interrupt request (OVR0) to CPU by IRR2 enabled
Remote frame reception interrupt request (OVR0) to CPU by IRR2 disabled
IMR5
R/W
13
1
Receive Message Interrupt Mask
0
1
Message reception interrupt request (RM1) to CPU by IRR1 enabled
Message reception interrupt request (RM1) to CPU by IRR1 disabled
IMR4
R/W
12
1
IMR3
H'F816
H'FA16
R/W
11
1
IMR2
R/W
10
1
H8S/2639, H8S/2638, H8S/2636,
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
IMR1
R/W
9
1
May 28, 2010
⎯
HCAN1 *
R
8
0
HCAN0