HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 1376

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Appendix B Internal I/O Register
PMR—PPG Output Mode Register
Note: This register is not available in the H8S/2635 Group.
Page 1326 of 1458
Group 3 Inversion
Bit
Initial value
Read/Write
0
1
Group 2 Inversion
Inverted output for pulse output group 3 (low-level output at pin for a 1 in PODRH)
Direct output for pulse output group 3 (high-level output at pin for a 1 in PODRH)
0
1
Inverted output for pulse output group 2 (low-level output at pin for a 1 in PODRH)
Direct output for pulse output group 2 (high-level output at pin for a 1 in PODRH)
Group 1 Inversion
0
1
Group 0 Inversion
Inverted output for pulse output group 1 (low-level output at pin for a 1 in PODRL)
Direct output for pulse output group 1 (high-level output at pin for a 1 in PODRL)
0
1
Inverted output for pulse output group 0 (low-level output at pin for a 1 in PODRL)
Direct output for pulse output group 0 (high-level output at pin for a 1 in PODRL)
G3INV
R/W
7
1
G2INV
R/W
6
1
Group 3 Non-Overlap
0
1
Normal operation in pulse output group 3 (output
values updated at compare match A in the selected
TPU channel)
Non-overlapping operation in pulse output group 3
(independent 1 and 0 output at compare match A
or B in the selected TPU channel)
G1INV
Group 2 Non-Overlap
R/W
0
1
5
1
Normal operation in pulse output group 2 (output
values updated at compare match A in the selected
TPU channel)
Non-overlapping operation in pulse output group 2
(independent 1 and 0 output at compare match A
or B in the selected TPU channel)
Group 1 Non-Overlap
0
1
G0INV
R/W
4
1
Normal operation in pulse output group 1 (output
values updated at compare match A in the selected
TPU channel)
Non-overlapping operation in pulse output group 1
(independent 1 and 0 output at compare match A
or B in the selected TPU channel)
H'FE27
Group 0 Non-Overlap
0
1
G3NOV
Normal operation in pulse output group 0 (output
values updated at compare match A in the selected
TPU channel)
Non-overlapping operation in pulse output group 0
(independent 1 and 0 output at compare match A
or B in the selected TPU channel)
R/W
3
0
G2NOV
R/W
2
0
H8S/2639, H8S/2638, H8S/2636,
G1NOV
R/W
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
1
0
G0NOV
R/W
0
0
May 28, 2010
PPG