HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 1438

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Appendix B Internal I/O Register
ICCR0—I
ICCR1—I
Page 1388 of 1458
Bit
Initial value
R/W
2
2
C Bus Control Register
C Bus Control Register
:
:
:
Notes: This register is valid only on the H8S/2638, H8S/2639, or H8S/2630 with the I
I
2
C Bus Interface Enable
0 I
1 I
R/W
ICE
7
0
I
the bus)
ICMR and ICDR can be accessed
2
2
2
C bus interface module disabled, with SCL and SDA signal pins set to port function
C bus interface module internal states initialized SAR and SARX can be accessed
C bus interface module enabled for transfer operations (pins SCL and SCA are driving
* Only 0 can be written, for flag clearing.
interface option added.
I
2
C Bus Interface Interrupt Enable
0 Interrupts disabled
1 Interrupts enabled
IEIC
R/W
6
0
MST
R/W
5
0
Note: * For details see section 15.2.5, I
Master/slave select, transmit/receive select
0
1
TRS
R/W
Control Register.
4
0
Acknowledge bit judgement selection
0 The value of the acknowledge bit is ignored, and
1 If the acknowledge bit is 1, continuous transfer is
0
1
0
1
continuous transfer is performed
interrupted
ACKE
R/W
Bus busy
Slave receive mode
Slave transmit mode
Master receive mode
Master transmit mode
0 Bus is free
1 Bus is free
3
0
[Clearing condition]
• When a stop condition is detected
[Clearing condition]
• When a stop condition is detected
Note: * For details see section 15.2.5, I
H'FF78
H'FF80
I
2
C Bus interface interrupt request flag
0 Waiting for transfer, or transfer in progress
1 Interrupt requested
Start condition/stop condition prohibit
BBSY
0 Writing 0 issues a start or stop condition,
1 Reading always returns a value of 1
R/W
2
0
Control Register.
in combination with the BBSY flag
Writing is ignored
2
C Bus
R/(W)*
IRIC
H8S/2639, H8S/2638, H8S/2636,
1
0
REJ09B0103-0800 Rev. 8.00
2
H8S/2630, H8S/2635 Group
C bus
SCP
R/W
0
0
2
C Bus
May 28, 2010
IIC0
IIC1