HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 16

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Item
21A.9.4 Erase-Verify
Mode
Figure 21A-13
Erase/Erase-Verify
Flowchart
21A.13
Mode
21B.4.3 Mode
Transitions
Figure 21B-3 Flash
Memory State
Transitions
21B.7.6 Flash Memory
Power Control Register
(FLPWCR)
Page xvi of l
Programmer
Page
780
787
801
816
Revision (See Manual for Details)
Figure amended
Title amended and description replaced
Notes amended
Notes: 2. This LSI transits to programmer mode by using the
Note amended
Note: * Subclock functions (subactive mode, subsleep mode,
and watch mode) are
and W-mask versions only. These functions cannot be
used with the other versions.
dedicated PROM programmer.
Increment
address
NG
NG
Set block start address as verify address
H'FF dummy write to verify address
Clear ESU bit in FLMCR1
Clear SWE bit in FLMCR1
Set SWE bit in FLMCR1
Set ESU bit in FLMCR1
Clear EV bit in FLMCR1
Clear E bit in FLMCR1
Set EV bit in FLMCR1
All erase block erased?
Last address of block?
*4
Set E bit in FLMCR1
Set EBR1 or EBR2
Verify data = all 1s?
Read verify data
End of erasing
Wait (t
Wait (t
Wait (t
Wait (t
Wait (t
Disable WDT
Wait (t
Enable WDT
Wait (t
Wait (t
Wait (t
n = 1
Start
sswe
cswe
sesu
cesu
sevr
sev
cev)
se
ce
OK
) ms
OK
OK
) μs
) μs
) μs
) μs
) μs
) μs
) μs
μs
*1
available in
NG
*5
*3 *4
*5
Start of erase
*5
Erase halted
*5
*5
*5
*5
*2
*5
*5
REJ09B0103-0800 Rev. 8.00
Clear SWE bit in FLMCR1
Clear EV bit in FLMCR1
Wait (t
Wait (t
Erase failure
n ≥ (N)?
the U-mask
cswe
cev
OK
) μs
) μs
*5
May 28, 2010
NG
n ← n + 1
*5
*5