HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 334

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 9 I/O Ports
Port D Data Register (PDDR)
PDDR is an 8-bit readable/writable register that stores output data for the port D pins (PD7 to
PD0).
PDDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port D Register (PORTD)
Note: * Determined by state of pins PD7 to PD0.
PORTD is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port D pins (PD7 to PD0) must always be performed on PDDR.
If a port D read is performed while PDDDR bits are set to 1, the PDDR values are read. If a port D
read is performed while PDDDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTD contents are determined by the pin states, as
PDDDR and PDDR are initialized. PORTD retains its prior state in software standby mode.
Page 284 of 1458
Bit
Initial value :
R/W
Bit
Initial value :
R/W
:
:
:
:
PD7DR
R/W
PD7
— *
R
7
0
7
PD6DR
R/W
PD6
— *
R
6
0
6
PD5DR
R/W
PD5
— *
R
5
0
5
PD4DR
R/W
PD4
— *
R
4
0
4
PD3DR
R/W
PD3
— *
R
3
0
3
PD2DR
R/W
PD2
— *
R
2
0
2
H8S/2639, H8S/2638, H8S/2636,
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
PD1DR
R/W
PD1
— *
R
1
0
1
May 28, 2010
PD0DR
R/W
PD0
— *
R
0
0
0