HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 345

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
• Mode 7
Port F Data Register (PFDR)
PFDR is an 8-bit readable/writable register that stores output data for the port F pins (PF7 to PF3,
PF0).
PFDR is initialized to B'00000**0 by a reset, and in hardware standby mode. It retains its prior
state in software standby mode.
Port F Register (PORTF)
Note: * Determined by state of pins PF7 to PF3, PF0.
PORTF is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port F pins (PF7 to PF3, PF0) must always be performed on PFDR.
If a port F read is performed while PFDDR bits are set to 1, the PFDR values are read. If a port F
read is performed while PFDDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTF contents are determined by the pin states, as
PFDDR and PFDR are initialized. PORTF retains its prior state in software standby mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Pin PF0 is setting a PFDDR bit to 1 makes the corresponding port F pin an output port, while
clearing the bit to 0 makes the pin an input port.
Setting a PFDDR bit to 1 makes the corresponding port F pin PF6 to PF3, PF0 an output port,
or in the case of pin PF7, the φ output pin. Clearing the bit to 0 makes the pin an input port.
:
:
:
:
PF7DR
R/W
PF7
— *
R
7
0
7
PF6DR
R/W
PF6
— *
R
6
0
6
PF5DR
R/W
PF5
— *
R
5
0
5
PF4DR
R/W
PF4
— *
R
4
0
4
PF3DR
R/W
PF3
— *
R
3
0
3
undefined undefined
undefined undefined
—
—
—
—
2
2
—
—
—
—
1
1
Section 9 I/O Ports
Page 295 of 1458
PF0DR
R/W
PF0
— *
R
0
0
0