HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 453

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
11.2
11.2.1
NDERH and NDERL are 8-bit readable/writable registers that enable or disable pulse output on a
bit-by-bit basis.
If a bit is enabled for pulse output by NDERH or NDERL, the NDR value is automatically
transferred to the corresponding PODR bit when the TPU compare match event specified by PCR
occurs, updating the output value. If pulse output is disabled, the bit value is not transferred from
NDR to PODR and the output value does not change.
NDERH and NDERL are each initialized to H'00 by a reset and in hardware standby mode. They
are not initialized in software standby mode.
NDERH Bits 7 to 0—Next Data Enable 15 to 8 (NDER15 to NDER8): These bits enable or
disable pulse output on a bit-by-bit basis.
Bits 7 to 0
NDER15 to NDER8
0
1
REJ09B0103-0800 Rev. 8.00
May 28, 2010
NDERH
Bit
Initial value :
R/W
NDERL
Bit
Initial value :
R/W
Register Descriptions
Next Data Enable Registers H and L (NDERH, NDERL)
:
:
:
:
NDER15 NDER14 NDER13 NDER12 NDER11 NDER10 NDER9
NDER7
R/W
R/W
7
0
7
0
Description
Pulse outputs PO15 to PO8 are disabled (NDR15 to NDR8 are not
transferred to POD15 to POD8)
Pulse outputs PO15 to PO8 are enabled (NDR15 to NDR8 are transferred
to POD15 to POD8)
NDER6
R/W
R/W
6
0
6
0
NDER5
R/W
R/W
5
0
5
0
NDER4
R/W
R/W
4
0
4
0
Section 11 Programmable Pulse Generator (PPG)
NDER3
R/W
R/W
3
0
3
0
NDER2
R/W
R/W
2
0
2
0
NDER1
R/W
R/W
1
0
1
0
Page 403 of 1458
(Initial value)
NDER8
NDER0
R/W
R/W
0
0
0
0

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