HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 465

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
11.3.3
Sample Setup Procedure for Normal Pulse Output: Figure 11-4 shows a sample procedure for
setting up normal pulse output.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
TPU setup
Port and
PPG setup
TPU setup
Normal Pulse Output
Figure 11-4 Setup Procedure for Normal Pulse Output (Example)
Set counting operation
Select interrupt request
Set initial output data
Select TGR functions
Select output trigger
Enable pulse output
Normal PPG output
Compare match?
Set TGRA value
Set next pulse
Set next pulse
Start counter
output data
output data
Yes
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[1] Set TIOR to make TGRA an output
[2] Set the PPG output trigger period
[3] Select the counter clock source
[4] Enable the TGIA interrupt in TIER.
[5] Set the initial output values in
[6] Set the DDR and NDER bits for the
[7] Select the TPU compare match
[8] Set the next pulse output values in
[9] Set the CST bit in TSTR to 1 to
[10] At each TGIA interrupt, set the next
Section 11 Programmable Pulse Generator (PPG)
compare register (with output
disabled)
with bits TPSC2 to TPSC0 in TCR.
Select the counter clear source
with bits CCLR1 and CCLR0.
The DTC can also be set up to
PODR.
pins to be used for pulse output to 1.
event to be used as the output
trigger in PCR.
NDR.
start the TCNT counter.
output values in NDR.
transfer data to NDR.
Page 415 of 1458

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