HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 52

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 1 Overview
Table 1-1
Item
CPU
Bus controller
PC break controller
(This function is not
implemented in the
H8S/2635 Group)
Data transfer
controller (DTC)
(This function is not
implemented in the
H8S/2635 Group)
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Overview
Specification
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General-register machine
⎯ Sixteen 16-bit general registers (also usable as sixteen 8-bit registers
High-speed operation suitable for realtime control
⎯ Maximum clock rate: 20 MHz
⎯ High-speed arithmetic operations
Instruction set suitable for high-speed operation
⎯ Sixty-nine basic instructions
⎯ 8/16/32-bit move/arithmetic and logic instructions
⎯ Unsigned/signed multiply and divide instructions
⎯ Multiply-and accumulate instruction
⎯ Powerful bit-manipulation instructions
CPU operating modes
⎯ Advanced mode: 16-Mbyte address space
Address space divided into 8 areas, with bus specifications settable
independently for each area
Choice of 8-bit or 16-bit access space for each area
2-state or 3-state access space can be designated for each area
Number of program wait states can be set for each area
Direct connection to burst ROM supported
Supports debugging functions by means of PC break interrupts
Two break channels
Can be activated by internal interrupt or software
Multiple transfers or multiple types of transfer possible for one activation
source
Transfer possible in repeat mode, block transfer mode, etc.
Request can be sent to CPU for interrupt that activated DTC
or eight 32-bit registers)
8/16/32-bit register-register add/subtract : 50 ns
16 × 16-bit register-register multiply
16 × 16 + 42-bit multiply and accumulate : 200 ns
32 ÷ 16-bit register-register divide
: 200 ns
: 1000 ns
H8S/2639, H8S/2638, H8S/2636,
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
May 28, 2010