HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 541

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
REJ09B0103-0800 Rev. 8.00
May 28, 2010
No
No
No
Figure 13-12 Sample Multiprocessor Serial Reception Flowchart
Read ORER and FER flags in SSR
Read ORER and FER flags in SSR
Read receive data in RDR
Read receive data in RDR
Read RDRF flag in SSR
Read RDRF flag in SSR
Clear RE bit in SCR to 0
Read MPIE bit in SCR
All data received?
FER ∨ ORER = 1
This station’s ID?
FER ∨ ORER = 1
Start reception
Initialization
RDRF = 1
RDRF = 1
<End>
Yes
Yes
Yes
Yes
No
No
Yes
No
Yes
Error processing
[4]
[3]
[1]
[2]
(Continued on
next page)
[5]
[1]
[2]
[3]
[4]
[5]
Section 13 Serial Communication Interface (SCI)
SCI initialization:
The RxD pin is automatically
designated as the receive data
input pin.
ID reception cycle:
Set the MPIE bit in SCR to 1.
SCI status check, ID reception
and comparison:
Read SSR and check that the
RDRF flag is set to 1, then read
the receive data in RDR and
compare it with this station's ID.
If the data is not this station's ID,
set the MPIE bit to 1 again, and
clear the RDRF flag to 0.
If the data is this station's ID,
clear the RDRF flag to 0.
SCI status check and data
reception:
Read SSR and check that the
RDRF flag is set to 1, then read
the data in RDR.
Receive error processing and
break detection:
If a receive error occurs, read the
ORER and FER flags in SSR to
identify the error. After
performing the appropriate error
processing, ensure that the
ORER and FER flags are all
cleared to 0.
Reception cannot be resumed if
either of these flags is set to 1.
In the case of a framing error, a
break can be detected by reading
the RxD pin value.
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