HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 558

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
Section 13 Serial Communication Interface (SCI)
• Reception
Page 508 of 1458
Receive operation should be stopped (by clearing RE to 0) before making a module stop mode,
software standby mode, watch mode, subactive mode, or subsleep mode transition. RSR, RDR,
and SSR are reset. If a transition is made without stopping operation, the data being received
will be invalid.
To continue receiving without changing the reception mode after the relevant mode is cleared,
set RE to 1 before starting reception. To receive with a different receive mode, the procedure
must be started again from initialization.
Figure 13-26 shows a sample flowchart for mode transition during reception.
Figure 13-23 Sample Flowchart for Mode Transition during Transmission
Read TEND flag in SSR
<Start of transmission>
Transition to software
standby mode, etc.
standby mode, etc.
Exit from software
operating mode?
<Transmission>
Yes
Yes
Yes
transmitted?
Initialization
TEND = 1
Change
All data
TE = 0
[2]
No
No
No
TE = 1
[1]
[3]
[1] Data being transmitted is
[2] If TIE and TEIE are set to 1, clear
[3] Includes module stop mode, watch
interrupted. After exiting software
standby mode, etc., normal CPU
transmission is possible by setting
TE to 1, reading SSR, writing TDR,
and clearing TDRE to 0, but note
that if the DTC has been activated,
the remaining data in DTCRAM will
be transmitted when TE and TIE
are set to 1.
them to 0 in the same way.
mode, subactive mode, and sub-
sleep mode.
H8S/2639, H8S/2638, H8S/2636,
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
May 28, 2010

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