HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 595

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
A two-channel I
H8S/2630 (the product equipped with the I
following notes when using this option.
A “W” is added to the part number in products in which this optional function is used.
Examples: HD64F2638WF *
Note: * When the optional function is used in a U-mask version, “U” is replaced with “W”.
15.1
A two-channel I
option. The I
bus) interface functions. The register configuration that controls the I
Philips configuration, however.
Each I
data, saving board and connector space.
15.1.1
• Selection of addressing format or non-addressing format
• Conforms to Philips I
• Two ways of setting slave address (I
• Start and stop conditions generated automatically in master mode (I
• Selection of acknowledge output levels when receiving (I
• Automatic loading of acknowledge bit when transmitting (I
• Wait function in master mode (I
REJ09B0103-0800 Rev. 8.00
May 28, 2010
⎯ I
⎯ Serial format: non-addressing format without acknowledge bit, for master operation only
⎯ A wait can be inserted by driving the SCL pin low after data transfer, excluding
2
acknowledgement. The wait can be cleared by clearing the interrupt flag.
C bus interface channel uses only one data line (SDA) and one clock line (SCL) to transfer
Example: HD64F2638UF → HD64F2638WF
2
(Only for the H8S/2638, H8S/2639, and H8S/2630)
C bus format: addressing format with acknowledge bit, for master/slave operation
Overview
Features
2
C bus interface conforms to and provides a subset of the Philips I
2
2
C bus interface is available as an option in the H8S/2638, H8S/2639, and
C bus interface is available for the H8S/2638, H8S/2639, and H8S/2630 as an
Section 15 I
2
C bus interface (I
2
C bus format)
2
2
C Bus Interface [Option]
C bus format)
2
2
C bus interface is the W-mask version). Observe the
C bus format)
(Only for the H8S/2638, H8S/2639, and H8S/2630)
2
C bus format)
2
C bus format)
2
Section 15 I
C bus differs partly from the
2
C bus format)
2
2
C bus (inter-IC
C Bus Interface [Option]
Page 545 of 1458

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