HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 603

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
15.2.2
SAR is an 8-bit readable/writable register that stores the slave address and selects the
communication format. When the chip is in slave mode (and the addressing format is selected), if
the upper 7 bits of SAR match the upper 7 bits of the first frame received after a start condition,
the chip operates as the slave device specified by the master device. SAR is assigned to the same
address as ICMR, and can be written and read only when the ICE bit is cleared to 0 in ICCR.
SAR is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 to 1—Slave Address (SVA6 to SVA0): Set a unique address in bits SVA6 to SVA0,
differing from the addresses of other slave devices connected to the I
Bit 0—Format Select (FS): Used together with the FSX bit in SARX to select the communication
format.
• I
• Synchronous serial format: non-addressing format without acknowledge bit, for master mode
The FS bit also specifies whether or not SAR slave address recognition is performed in slave
mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Bit
Initial value :
R/W
only
2
C bus format: addressing format with acknowledge bit
Slave Address Register (SAR)
:
:
SVA6
R/W
7
0
SVA5
R/W
6
0
SVA4
R/W
5
0
SVA3
R/W
4
0
SVA2
(Only for the H8S/2638, H8S/2639, and H8S/2630)
R/W
3
0
SVA1
2
Section 15 I
R/W
C bus.
2
0
SVA0
2
R/W
C Bus Interface [Option]
1
0
Page 553 of 1458
R/W
FS
0
0

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