HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 655

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
• Notes on I
• Notes on IRIC Flag Clearance when Using Wait Function
REJ09B0103-0800 Rev. 8.00
May 28, 2010
If the rise time of the 9th SCL acknowledge exceeds the specification because the bus load
capacitance is large, or if there is a slave device of the type that drives SCL low to effect a
wait, issue the stop condition instruction after reading SCL and determining it to be low, as
shown below.
If the SCL rise time exceeds the designated duration or if the slave device is of the type that
keeps SCL low and applies a wait state when the wait function is used in the master mode of
the I
low, as shown below.
Clearing the IRIC flag to 0 when WAIT is set to 1 and SCL is being held at high level can
cause the SDA value to change before SCL goes low, resulting in a start condition or stop
condition being generated erroneously.
SDA
IRIC
SCL
2
C bus interface, read SCL and clear the IRIC flag after determining that SCL has gone
2
SCL
SDA
IRIC
C Bus Interface Stop Condition Instruction Issuance
Figure 15-24 IRIC Flag Clearance in WAIT = 1 Status
VIH
Figure 15-23 Timing of Stop Condition Issuance
9th clock
As waveform rise is late,
[1] Determination of SCL = low
SCL is detected as low
V
SCL = low detected
High period secured
[1] Judgement that SCL = low [2] IRIC clearance
IH
SCL = high duration
maintained
[2] Stop condition instruction issuance
(Only for the H8S/2638, H8S/2639, and H8S/2630)
Stop condition
Section 15 I
2
C Bus Interface [Option]
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