HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 691

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
16.2.16 Unread Message Status Register (UMSR)
The unread message status register (UMSR) is a 16-bit readable/writable register containing status
flags that indicate, for individual mailboxes (buffers), that a received message has been
overwritten by a new receive message before being read. When a message is overwritten by a new
receive message, the old data is lost.
Bits 15 to 0—Unread Message Status Flags (UMSRx): Status flags indicating that an unread
receive message has been overwritten.
Bit x: UMSRx
0
1
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Initial value:
Initial value:
Note: * Only 1 can be written, to clear the flag to 0.
UMSR
R/W:
R/W:
Bit:
Bit:
UMSR15 UMSR14 UMSR13 UMSR12 UMSR11 UMSR10
UMSR7
R/(W) *
R/(W) *
Description
[Clearing condition]
Unread receive message is overwritten by a new message
[Setting condition]
15
0
7
0
Writing 1
When a new message is received before RXPR is cleared
UMSR6
R/(W) *
R/(W) *
14
0
6
0
UMSR5
R/(W) *
R/(W) *
13
0
5
0
UMSR4
R/(W) *
R/(W) *
12
0
4
0
UMSR3
R/(W) *
R/(W) *
11
Section 16 Controller Area Network (HCAN)
0
3
0
UMSR2
R/(W) *
R/(W) *
10
0
2
0
UMSR1
UMSR9
R/(W) *
R/(W) *
9
0
1
0
(Initial value)
Page 641 of 1458
(x = 15 to 0)
UMSR0
R/(W) *
UMSR8
R/(W) *
8
0
0
0

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