HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 701

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
16.3
The device is equipped with a 1-channel HCAN module or with 2-channel HCAN modules, which
are controlled independently. In the latter case, both modules have identical specifications, and
they are controlled in the same manner.
16.3.1
The HCAN can be reset by a hardware reset or software reset.
Hardware Reset (HCAN Module Stop, Reset * , Hardware * /Software Standby): Initialization
is performed by automatic setting of the MCR reset request bit (MCR0) in MCR and the reset state
bit (GSR3) in GSR within the HCAN (hardware reset). At the same time, all internal registers are
initialized. However mailbox contents are retained. A flowchart of this reset is shown in figure
16-4.
Note: * In a reset and in hardware standby mode, the module stop bit is initialized to 1 and the
Software Reset (Write to MCR0): In normal operation initialization is performed by setting the
MCR reset request bit (MCR0) in MCR (Software reset). With this kind of reset, if the CAN
controller is performing a communication operation (transmission or reception), the initialization
state is not entered until the message has been completed. During initialization, the reset state bit
(GSR3) in GSR is set. In this kind of initialization, the error counters (TEC and REC) are
initialized but other registers and RAM (mailboxes) are not. A flowchart of this reset is shown in
figure 16-5.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
HCAN enters the module stop state.
Operation
Hardware and Software Resets
Section 16 Controller Area Network (HCAN)
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