HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 709

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
16.3.3
Message transmission is performed using mailboxes 1 to 15. The transmission procedure is
described below, and a transmission flowchart is shown in figure 16-6.
Initialization (after hardware reset only)
a. Clearing of IRR0 bit in interrupt register (IRR)
b. Bit rate settings
c. Mailbox transmit/receive settings
d. Mailbox (RAM) initialization
e. Message transmission method setting
Interrupt and transmit data settings
a. CPU interrupt source setting
b. Arbitration field setting
c. Control field setting
d. Data field setting
Message transmission and interrupts
a. Message transmission wait
b. Message transmission completion and interrupt
c. Message transmission cancellation
d. Message retransmission
Initialization (After Hardware Reset Only): These settings should be made while the HCAN is
in bit configuration mode.
• IRR0 clearing
• Bit rate settings
REJ09B0103-0800 Rev. 8.00
May 28, 2010
The reset interrupt flag (IRR0) is always set after a reset or recovery from software standby
mode. As an HCAN interrupt is initiated immediately when interrupts are enabled, IRR0
should be cleared.
Set values relating to the CAN bus communication speed and resynchronization. Refer to Bit
Rate and Bit Timing Settings in 16.3.2, Initialization after Hardware Reset, for details.
Transmit Mode
Section 16 Controller Area Network (HCAN)
Page 659 of 1458

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