HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 779

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
19.2.9
Bit
Initial value
Read/Write
There are four 16-bit read/write PWBFR2 registers (PWBFR2A to PWBFR2D). When a
PWCYR2 compare match occurs, data is transferred from PWBFR2A to PWDTR2A or
PWDTR2E, from PWBFR2B to PWDTR2B or PWDTR2F, from PWBFR2C to PWDTR2C or
PWDTR2G, and from PWBFR2D to PWDTR2D or PWDTR2H. The transfer destination is
determined by the value of the TDS bit.
PWBFR2 is initialized to H'EC00 upon reset, and in standby mode, watch mode * , subactive
mode * , subsleep mode * , and module stop mode.
Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the
Bits 15 to 13—Reserved: They are always read as 1 and cannot be modified.
Bit 12—Transfer Destination Select (TDS): Bit 12 selects the PWDTR2 register to which data is
to be transferred.
Register
PWBFR2A
PWBFR2B
PWBFR2C
PWBFR2D
Bits 11 and 10—Reserved: They are always read as 1 and cannot be modified.
Bits 9 to 0—Duty (DT): Bits 9 to 0 comprise the data transferred to bits 9 to 0 in PWDTR2.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
U-mask and W-mask versions, and H8S/2635 Group only.
These functions cannot be used with the other versions.
PWM Buffer Registers 2A to 2D (PWBFR2A to PWBFR2D)
15
1
Bit 12: TDS
0
1
0
1
0
1
0
1
14
1
13
— TDS —
— R/W —
1
12
0
Description
PWDTR2E selected
PWDTR2F selected
PWDTR2C selected
PWDTR2G selected
PWDTR2D selected
PWDTR2H selected
PWDTR2A selected
PWDTR2B selected
11
1
10
— DT9 DT8 DT7 DT6 DT5 DT4 DT3 DT2 DT1 DT0
— R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
1
9
0
8
0
7
0
6
0
Section 19 Motor Control PWM Timer
5
0
4
0
3
0
(Initial value)
(Initial value)
(Initial value)
(Initial value)
2
0
Page 729 of 1458
1
0
0
0

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