HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 813

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Bit 3—RAM Select (RAMS): Specifies selection or non-selection of flash memory emulation in
RAM. When RAMS = 1, all flash memory block are program/erase-protected.
Bit 3: RAMS
0
1
Bits 2, 1 and 0—Flash Memory Area Selection: These bits are used together with bit 3 to select
the flash memory area to be overlapped with RAM (See table 21A-7).
Table 21A-8 Flash Memory Area Divisions (H8S/2636)
Addresses
H'FFE000 to H'FFE3FF
H'000000 to H'0003FF
H'000400 to H'0007FF
H'000800 to H'000BFF
H'000C00 to H'000FFF
*: Don't care
21A.7.6 Flash Memory Power Control Register (FLPWCR)
FLPWCR enables or disables a transition to the flash memory power-down mode when the LSI
switches to subactive mode * .
Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Initial value:
U-mask version only.
These functions cannot be used with the other versions.
R/W:
Bit:
Description
Emulation not selected
Program/erase-protection of all flash memory blocks is disabled
Emulation selected
Program/erase-protection of all flash memory blocks is enabled
PDWND
R/W
7
0
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
Block Name
RAM area 1 kbyte
EB3 (1 kbyte)
—
R
6
0
—
R
5
0
RAMS
0
1
1
1
1
—
R
4
0
RAM2
*
0
0
1
1
—
R
3
0
RAM1
*
0
1
0
1
—
R
2
0
—
R
RAM0
*
*
*
*
*
1
0
Section 21A ROM
(H8S/2636 Group)
Page 763 of 1458
(Initial value)
—
R
0
0