HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 882

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
Section 21B ROM
(H8S/2638 Group, H8S/2639 Group, H8S/2630 Group)
Page 832 of 1458
Notes: 1. Prewriting (setting erase block data to all 0s) is not necessary.
2. Verify data is read in 16-bit (word) units.
3. Make only a single-bit specification in the erase block registers (EBR1 and EBR2). Two or more bits must not be set simultaneously.
4. Erasing is performed in block units. To erase multiple blocks, each block must be erased in turn.
5. The wait times and the value of N are shown in section 24.2.7, 24.3.7, and 24.4.7, Flash Memory Characteristics.
Increment
address
Figure 21B-13 Erase/Erase-Verify Flowchart
NG
NG
Set block start address as verify address
H'FF dummy write to verify address
Clear ESU bit in FLMCR1
Clear SWE bit in FLMCR1
Set SWE bit in FLMCR1
Set ESU bit in FLMCR1
Clear EV bit in FLMCR1
Clear E bit in FLMCR1
*4
Set EV bit in FLMCR1
All erase block erased?
Last address of block?
Set E bit in FLMCR1
Set EBR1 or EBR2
Verify data = all 1s?
Read verify data
Wait (t
Wait (t
End of erasing
Wait (t
Wait (t
Wait (t
Disable WDT
Wait (t
Wait (t
Enable WDT
Wait (t
Wait (t
n = 1
Start
sswe
cswe
sesu
cesu
sevr
sev
se
cev)
ce
OK
) ms
OK
OK
) μs
) μs
) μs
) μs
) μs
) μs
) μs
μs
*1
NG
*5
*3 *4
*5
Start of erase
*5
Erase halted
*5
*5
*5
*5
*2
*5
*5
Clear SWE bit in FLMCR1
Clear EV bit in FLMCR1
Wait (t
Wait (t
Erase failure
n ≥ (N)?
cswe
cev
OK
) μs
H8S/2639, H8S/2638, H8S/2636,
) μs
*5
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
NG
n ← n + 1
*5
*5
May 28, 2010

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