HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 900

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
Section 21C ROM
(H8S/2635 Group)
21C.1.2 Register Configuration
The H8S/2638 and H8S/2639 operating mode is controlled by the mode pins and the MDCR
register. The register configuration is shown in table 21C-1.
Table 21C-1 Register Configuration
Register Name
Mode control register
Note: * Lower 16 bits of the address.
21C.2 Register Descriptions
21C.2.1 Mode Control Register (MDCR)
Note: * Determined by pins MD2 to MD0.
MDCR is an 8-bit register used to monitor the current H8S/2638 Group, H8S/2639 Group, and
H8S/2630 Group operating mode.
Bit 7—Reserved: Only 1 should be written to these bits.
Bits 6 to 3—Reserved: These bits are always read as 0 and cannot be modified.
Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the input levels at pins
MD2 to MD0 (the current operating mode). Bits MDS2 to MDS0 correspond to pins MD2 to
MD0. MDS2 to MDS0 are read-only bits, and cannot be modified. The mode pin (MD2 to MD0)
input levels are latched into these bits when MDCR is read. These latches are canceled by a reset.
21C.3 Operation
The on-chip ROM is connected to the CPU by a 16-bit data bus, and both byte and word data can
be accessed in one state. Even addresses are connected to the upper 8 bits, and odd addresses to
the lower 8 bits. Word data must start at an even address.
Page 850 of 1458
Initial value:
R/W:
Bit:
R/W
7
1
MDCR
Abbreviation
6
0
5
0
R/W
R/W
4
0
Initial Value
Undefined
0
3
MDS2
— *
H8S/2639, H8S/2638, H8S/2636,
R
2
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
H'FDE7
MDS1
Address*
— *
R
1
May 28, 2010
MDS0
— *
R
0

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