HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 983

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
23A.2.3 Low-Power Control Register (LPWRCR)
The LPWRCR is an 8-bit read/write register that controls the low power dissipation modes.
The LPWRCR is initialized to H'00 at a reset and when in hardware standby mode. It is not
initialized in software standby mode. The following describes bits 7 to 2. For details of other bits,
see section 22A.2.2, Low-Power Control Register (LPWRCR).
Bits 7 to 3—Reserved: Bits DTON, LSON, NESEL, SUBSTP and RFCUT must always be
written with 0, as this version does not support subclock operation.
Bit 2—Reserved: Only write 0 to this bit.
23A.2.4 Timer Control/Status Register (TCSR)
Note: * Only write 0 to clear the flag.
TCSR is an 8-bit read/write register that selects the clock input to WDT1 TCNT and the mode.
Here, we describe bit 4. For details of the other bits in this register, see section 12.2.2, Timer
Control/Status Register (TCSR).
The TCSR is initialized to H'00 at a reset and when in hardware standby mode. It is not initialized
in software standby mode.
Bit 4—Reserved: The PSS bit must always be written with 0 since no subclock functions are
available in versions other than the U-mask and W-mask versions.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Bit
Initial value
R/W
Bit
Initial value
R/W
:
:
:
:
:
:
R/(W)*
DTON
OVF
R/W
7
0
7
0
LSON
WT/IT
R/W
R/W
6
0
6
0
NESEL
TME
R/W
R/W
HD6432638F, HD64F2630F, HD6432630F, HD64F2635F, HD6432635F, HD6432634F]
5
0
5
0
Section 23A Power-Down Modes
SUBSTP
PSS
R/W
R/W
4
0
4
0
RST/NMI
RFCUT
R/W
R/W
3
0
3
0
CKS2
[HD64F2636F, HD64F2638F, HD6432636F,
R/W
R/W
2
0
2
0
STC1
CKS1
R/W
R/W
1
0
1
0
Page 933 of 1458
STC0
CKS0
R/W
R/W
0
0
0
0

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