HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 11

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Section 1 CPU
1.1
1.2
1.3
1.4
1.5
1.6
1.7
Section 2 Instruction Descriptions
2.1
2.2
Overview...........................................................................................................................
1.1.1
1.1.2
1.1.3
1.1.4
CPU Operating Modes ......................................................................................................
Address Space................................................................................................................... 10
Register Configuration...................................................................................................... 11
1.4.1
1.4.2
1.4.3
1.4.4
Data Formats..................................................................................................................... 16
1.5.1
1.5.2
Instruction Set ................................................................................................................... 19
1.6.1
1.6.2
1.6.3
1.6.4
Addressing Modes and Effective Address Calculation ..................................................... 33
Tables and Symbols .......................................................................................................... 41
2.1.1
2.1.2
2.1.3
2.1.4
2.1.5
2.1.6
Instruction Descriptions .................................................................................................... 47
2.2.1 (1)
2.2.1 (2)
2.2.1 (3)
2.2.2
2.2.3
2.2.4 (1)
Features................................................................................................................
Differences between H8S/2600 CPU and H8S/2000 CPU ..................................
Differences from H8/300 CPU ............................................................................
Differences from H8/300H CPU..........................................................................
Overview.............................................................................................................. 11
General Registers ................................................................................................. 12
Control Registers ................................................................................................. 13
Initial Register Values.......................................................................................... 15
General Register Data Formats ............................................................................ 16
Memory Data Formats ......................................................................................... 18
Overview.............................................................................................................. 19
Instructions and Addressing Modes ..................................................................... 20
Table of Instructions Classified by Function ....................................................... 22
Basic Instruction Formats .................................................................................... 32
Assembly-Language Format ................................................................................ 42
Operation ............................................................................................................. 43
Condition Code .................................................................................................... 44
Instruction Format................................................................................................ 44
Register Specification .......................................................................................... 45
Bit Data Access in Bit Manipulation Instructions................................................ 46
ADD (B).......................................................................................................... 48
ADD (W)......................................................................................................... 49
ADD (L).......................................................................................................... 50
ADDS.............................................................................................................. 51
ADDX ............................................................................................................. 52
AND (B).......................................................................................................... 53
......................................................................................................................
Contents
.................................................................................. 41
Rev. 4.00 Feb 24, 2006 page ix of xiv
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