HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 125

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
2.2.29 (1)
EEPMOV (MOVe data to EEPROM)
Operation
if R4L
else next;
Assembly-Language Format
EEPMOV.B
Operand Size
Description
This instruction performs a block data transfer. It moves data from the memory location specified
in ER5 to the memory location specified in ER6, increments ER5 and ER6, decrements R4L, and
repeats these operations until R4L reaches zero. Execution then proceeds to the next instruction.
The data transfer is performed a byte at a time, with R4L indicating the number of bytes to be
transferred. The byte symbol in the assembly-language format designates the size of R4L (and
limits the maximum number of bytes that can be transferred to 255). No interrupts are detected
while the block transfer is in progress.
When the EEPMOV.B instruction ends, R4L contains 0 (zero), and ER5 and ER6 contain the last
transfer address + 1.
Operand Format and Number of States Required for Execution
Note: * n is the initial value of R4L. Although n bytes of data are transferred, 2(n + 1) data accesses are
Notes
This instruction first reads the memory locations indicated by ER5 and ER6, then carries out the
block data transfer.
Addressing
repeat @ER5+
until R4L = 0
Mode
performed, requiring 2(n + 1) states. (n = 0, 1, 2, …, 255).
0 then
R4L – 1
EEPMOV (B)
EEPMOV.B
Mnemonic
@ER6+
R4L
Operands
1st byte
7
B
Condition Code
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
2nd byte
5
Instruction Format
Rev. 4.00 Feb 24, 2006 page 109 of 322
I
C
UI H
Section 2 Instruction Descriptions
3rd byte
5
U
9
N
Block Data Transfer
4th byte
8
REJ09B0139-0400
Z
F
— —
V
4 + 2n *
States
No. of
C

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