HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 192

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Section 2 Instruction Descriptions
2.2.51 (6)
ROTL (ROTate Left)
Operation
ERd (left rotation)
Assembly-Language Format
ROTL.L #2, ERd
Operand Size
Longword
Description
This instruction rotates the bits in a 32-bit register ERd (destination operand) two bits to the left.
The most significant two bits (bits 31 and 30) are rotated to the least significant two bits (bits 1
and 0), and bit 30 is also copied to the carry flag.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Notes
Rev. 4.00 Feb 24, 2006 page 176 of 322
REJ09B0139-0400
Register direct
Addressing
Mode
ROTL (L)
Mnemonic
ROTL.L
C
ERd
Operands
MSB
b31
#2, ERd
b30
1st byte
1
. . . .
2
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 30.
2nd byte
F
Instruction Format
cleared to 0.
cleared to 0.
I
0 erd
UI H
b1
3rd byte
LSB
b0
U
N
4th byte
Z
V
0
States
No. of
C
Rotate
1

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